Present day integrated circuits (ICs) are implemented by using a plurality of interconnected semiconductor devices, usually field effect transistors (FETs), also called metal oxide semiconductor field effect transistors (MOSFETs), or simply MOS transistors. For simplicity and clarity of discussion, the semiconductor devices referred to herein will be MOS transistors, although there is no intention to limit the invention to application to any one specific type of semiconductor device. An MOS transistor includes a gate electrode as a control electrode and spaced apart source and drain regions formed in the semiconductor substrate and between which a current can flow. A control voltage applied to the gate electrode controls the flow of current through a channel between the source and drain regions. As the complexity of the integrated circuits increases, more and more MOS transistors are needed to implement the integrated circuit function. As more and more transistors are designed into the IC, it becomes important to shrink the size of individual MOS transistors so that the overall size of the IC remains reasonable and the IC can be reliably manufactured. Shrinking the size of an MOS transistor implies that the minimum feature size, that is, the minimum width of a line, the minimum size of an opening, or the minimum spacing between lines, is reduced. MOS transistors have now been aggressively reduced to the point at which the gate electrode of the transistor is less than or equal to 20 nanometers (nm) in width. One of the limiting factors in the continued shrinking of integrated semiconductor devices is the resistance of contacts to doped regions such as the source and drain regions of an MOS transistor. Contact to a doped region is usually made by a conductive plug that extends through an opening in an overlying dielectric layer and electrically contacts the surface of the doped region. The conductive plug is usually formed by depositing a layer of titanium followed by a barrier layer of titanium nitride. The opening is then filled by a chemical vapor deposited layer of tungsten. As device sizes decrease, the aspect ratio of contact openings (that is, the ratio of the height of the opening to its width) increases. Titanium nitride has a relatively high resistance, and as the size of the contact opening decreases and the aspect ratio increases, the resistance of the titanium nitride component of the conductive plug becomes increasingly larger.
Accordingly, it is desirable to provide methods for fabricating semiconductor devices that have low resistance contacts to doped regions even as device sizes are reduced. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.